1. Field of the Invention
The present invention relates to a method for driving an anti-ferroelectric liquid crystal display (LCD) panel, and more particularly, to a method for driving an anti-ferroelectric LCD panel in which a plurality of parallel signal electrode lines are arranged over anti-ferroelectric liquid crystal cells (LCs), and a plurality of parallel scan electrode lines are arranged below the anti-ferroelectric LCs, perpendicular to the signal electrode lines.
2. Description of the Related Art
Referring to FIG. 1, a general anti-ferroelectric LCD 1 includes an anti-ferroelectric LCD panel 11 and a driving apparatus thereof. The anti-ferroelectric LCD panel 11 has a series of parallel signal electrode lines SL1, SL2, SL3, . . . , SLn arranged over anti-ferroelectric LCs, and a series of parallel scan electrode lines CL1, CL2, CL3, . . . , CLm arranged below the anti-ferroelectric LCs, wherein the signal electrode lines SL1, SL2, SL3, . . . , SLn are perpendicular to the scan signal electrode lines CL1, CL2, CL3, . . . , CLm. The signal electrode lines SL1, SL2, SL3, . . . , SLn and the scan electrode lines CL1, CL2, CL3, . . . , CLm are formed of a transparent conductive material, for example, indium tin oxide (ITO).
As shown in FIG. 1, the driving apparatus includes a segment driver 12, a modulation signal generator 131 and a common driver 132. The driving apparatus receives a data signal DATA, a shift clock signal SCK, a frame signal FLM and a latch clock signal LCK from a host, for example, from a notebook computer. The segment driver 12 stores the received data signal for each of the signal electrode lines SL1, SL2, SL3, . . . , SLn, according to the shift clock signal SCK. The segment driver 12 applies a signal voltage corresponding to the stored data signal DATA to each of the signal electrode lines SL1, SL2, SL3, . . . , SLn according to the latch clock signal LCK.
The frame signal FLM indicates the starting point of a frame. The modulation signal generator 131 divides the frequency of the latch clock signal LCK to generate a modulation signal. The polarity of the output voltages from the segment driver 12 and the common driver 132 are controlled by the modulation signal.
The common driver 132 applies a corresponding scan voltage to each of the scan electrode lines CL1, CL2, CL3, . . . , CLm in succession according to the controls of the latch clock signal LCK, the frame signal FLM and the modulation signal. As a result, the orientation state of the anti-ferroelectric LCs of a pixel to be displayed is shifted, thereby transmitting light or blocking the transmission of light.
FIG. 2 illustrates the waveform of a common drive voltage applied to a scan electrode line by a conventional driving method.
Referring to FIG. 2, during a first selection period ts1 corresponding to a unit slot (SL), a scanning selection voltage +Vs is applied, and the orientation state of anti-ferroelectric LCs selected depending on a corresponding display data signal Ss are shifted into a ferro-electric state, which allows transmission of light from the outside. During the subsequent first holding period tH1, a holding voltage +VH, which has the same polarity as the scanning selection voltage +Vs, but its level is lower than that of the scanning selection voltage +Vs, is applied, and the selected LCs are maintained in the ferroelectric state. During the subsequent first reset period tR1, ground voltage is applied and the LCs are restored to the anti-ferroelectric state from the ferroelectric state. The first reset period tR1 is required for smooth inverse driving during the subsequent unit driving period.
During the subsequent second selection period tS2, a scanning selection voltage xe2x88x92VS is applied and anti-ferroelectric LCs selected depending on a corresponding display data signal Ss are shifted into the ferroelectric state, which allows transmission of light from the outside. During the subsequent second holding period tH2, a holding voltage xe2x88x92VH, which has the same polarity as the scanning selection voltage xe2x88x92Vs, but its level is higher than that of the scanning selection voltage xe2x88x92Vs, is applied and the selected LCs are maintained in the ferroelectric state. During the subsequent second reset period tR2, ground voltage is applied and the LCs are restored to the anti-ferroelectric state from the ferroelectric state. The second reset period tR2 is required for smooth inverse driving of the subsequent unit driving period.
FIG. 3 shows the change of transmittancy of the selected LCs during the first or second reset period tR1 or tR2 of FIG. 2. In FIG. 3, reference numeral 31 indicates a circular waveform in the state where a probe voltage is not applied, and reference numerals 311, 312, 313 and 314 indicate interference waveforms when the probe voltage is applied. As described with reference to FIG. 2, during the first or second reset period tR1 or tR2, the level of voltage applied to a scanning electrode line is changed from the holding voltage +VH or xe2x88x92VH to ground voltage, so that the selected LCs in the ferroelectric state are restored to the anti-ferroelectric state. As a result, light transmittancy of the selected LCs is lowered, as shown in FIG. 3.
In anti-ferroelectric LCD panels, brightness increases with a rising state restoration time in the selected LCs. However, when an anti-ferroelectric LCD panel is simply driven by the conventional method as illustrated in FIG. 2, it takes a long period of time to restore the orientation state of LCs in the first or second reset period tR1 or tR2, and thus brightness of the anti-ferroelectric LCD panel decreases.
FIG. 4 illustrates the waveform of a common drive voltage applied to a scan electrode line by another conventional driving method. In FIG. 4, like reference numerals are used to refer to like operations of FIG. 2. Compared with FIG. 2, the driving waveform of FIG. 4 further includes single activation periods tB1, and tB2, for which a single blanking pulse is applied, between the first holding period tH1 and the first reset period tR1, and between the second holding period tH2 and the second reset period tR2.
FIG. 5 illustrates the change of transmittancy of the selected LCs during the first and second reset periods tR1 and tR2. In FIG. 5, reference numeral 51 indicates a non-active waveform that appears when applying the driving method of FIG. 2. Reference numeral 521 indicates an active waveform that appears when applying the driving method of FIG. 4, and reference numerals 522 and 523 indicate interference waveforms when the probe voltage is applied. As shown in FIG. 5, the state restoration time becomes short due to the presence of the single activation periods tB1 and tB2 during each of which the signal blanking pulse is applied.
However, when the driving method of FIG. 4 is applied, the state restoration is sensitive to temperature variations. In other words, when the neighboring temperature is higher or lower than room temperature, the single blanking pulse applied during each of the single activation periods tB1, and tB2 acts as a noise component, so that the state restoration time cannot be reduced.
To solve the above problems, it is an objective of the present invention to provide a method for driving an anti-ferroelectric liquid crystal display (LCD) panel, which can consistently reduce the time required for restoring the state in liquid crystal cells, regardless of ambient temperature changes.
To achieve the objective of the present invention, there is provided a method for driving an anti-ferroelectric liquid crystal display (LCD) panel in which a plurality of parallel signal electrode lines are arranged over anti-ferroelectric liquid crystal cells (LCs) and a plurality of parallel scan electrode lines are arranged below the anti-ferroelectric LCs, perpendicular to the signal electrode lines, the method comprising the steps of selectively shifting LCs into a ferroelectric state, keeping the selected LCs in the ferroelectric state, activating the selected LCs, and restoring the activated LCs to an anti-ferroelectric state.
In particular, a scan selection voltage is applied to a scan electrode lines to be scanned, and a display data signal is applied to all of the signal electrode lines, to selectively shift LCs into a ferroelectric state. Next, a holding voltage, which is lower than the scan selection voltage and has the same polarity, is applied to the scan electrode line for a predetermined period of time, to keep the selected LCs in the ferroelectric state. Alternating current (AC) pulses, each having inverted polarity and a voltage lower than the scan selection voltage, are applied to the scan electrode line, to activate the selected LCs. Then, ground voltage is applied to the scan electrode line to restore the activated LCs to an anti-ferroelectric state.
According to the inventive method for driving an anti-ferroelectric LCD panel, in the step of activating the selected LCs, AC pulses, each having inverted polarity and a voltage lower than the scan selection voltage, are applied to the scan electrode lines. As a result, the time required for restoring the state of LCs can be reduced with consistency regardless of temperature changes. The alternating current (AC) pulses are generated by switching DC voltages such as +VS, +VH, ground voltage, xe2x88x92VS and xe2x88x92VH. The width of each of the AC pulses corresponds to the length of time taken to switch the DC voltages.